Direct Transistor-Level Layout for Digital Blocks

by

Write The First Customer Review

Cell-based design methodologies have dominated layout generation of digital circuits. Unfortunately, the growing demands for transparent process portability, increased performance, and low-level device sizing for timing/power are poorly handled in a fixed cell library. Direct Transistor-Level Layout For Digital Blocks proposes a direct transistor-level layout approach for small blocks of custom digital logic as an alternative that better accommodates demands for device-level flexibility. This approach captures essential ...

Direct Transistor-Level Layout for Digital Blocks 2013, Springer-Verlag New York Inc., New York, NY

ISBN-13: 9781475779516

Paperback

Select
Direct Transistor-Level Layout for Digital Blocks 2004, Springer, Boston, MA

ISBN-13: 9781402076657

2004 edition

Hardcover

Select