The methodology described in this book is the result of many years of research experience in the field of synthesizable VHDL design targeting FPGA based platforms. VHDL was first conceived as a documentation language for ASIC designs. Afterwards, the language was used for the behavioral simulation of ASICs, and also as a design input for synthesis tools. VHDL is a rich language, but just a small subset of it can be used to write synthesizable code, from which a physical circuit can be obtained. Usually VHDL books describe ...

Synthesizable VHDL Design for FPGAs 2016, Springer

ISBN-13: 9783319377339

Softcover Reprint of the Origi edition

Trade paperback

Synthesizable VHDL Design for FPGAs 2013, Springer International Publishing AG, Cham

ISBN-13: 9783319025469

2014 edition