Low-Power High-Level Synthesis for Nanoscale CMOS Circuits

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This self-contained book addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits. The material deals primarily with high-level (architectural or behavioral) energy dissipation.

Low-Power High-Level Synthesis for Nanoscale CMOS Circuits 2010, Springer-Verlag New York Inc., New York, NY

ISBN-13: 9781441945549

Paperback

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Low-Power High-Level Synthesis for Nanoscale CMOS Circuits 2008, Springer

ISBN-13: 9780387764733

2008 edition

Hardcover

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