In this work a scaling approach is studied to develop a transistor technology which achieves a high gain as well as a high output power at W-band ...
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In this work a scaling approach is studied to develop a transistor technology which achieves a high gain as well as a high output power at W-band frequencies and can be applied in the existing fabrication process for MMICs. Following the theoretical scaling rules for field effect transistors lateral and vertical critical dimensions of 100 nm and 10 nm must be achieved, respectively. Therefore various new fabrication processes were developed to enable the new critical dimensions with a sufficient production yield for MMIC fabrication. Transistors fabricated with these methods were evaluated regarding the influence of the scaled geometries on the device characteristics using S-parameter as well as DC-measurements. As a result a transistor technology could be established with a transconductance above 600 mS/mm which is one of the highest reported values for GaN-based HEMTs so far. Furthermore, these transistors feature a very low parasitic capacitance of 0.3 pF/mm and can as a consequence achieve a current-gain cut-off frequency of more than 110 GHz. Besides the high frequency characteristics short channel effects and their influence on the device characteristics were also evaluated. The scaled transistors are dominated by a drain induced barrier lowering (DIBL) and a critical aspect ratio of approximately 14 is necessary to suppress the DIBL-effect in GaN-HEMTs.
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